1. Field of the Invention
The present invention relates to an electronic part packaged in a resin mold package; and more particularly, to a structure of a hybrid integrated circuit substrate with a lead frame supporting the circuit substrate. The hybrid integrated circuit substrate of the present invention has a comparatively large size and comprises a substrate and a plurality of active and passive elements disposed thereon, wherein the hybrid integrated circuit substrate and a part of the lead frame are encapsulated by the resin mold package.
2. Description of the Related Art
In recent years, resin mold packages have become popular for packaging of semiconductor integrated circuits and hybrid integrated circuits. In a resin mold package, a semiconductor integrated circuit chip or a ceramic substrate, having active and passive elements thereon, is insert-molded with a lead frame. Hybrid integrated circuits have become popular to provide higher integration circuits. The higher the integration of a hybrid integrated circuit, the larger the dimensions become of the circuit substrate and the resin mold package. Higher integration circuits have problems such as cracking of the resin mold package during storage and operation due to the differences in expansion coefficients and adhesion characteristics of, for example, the resin mold package, lead frame and ceramic substrate. This problem will be briefly explained with reference to FIGS. 7(a) and 7(b).
FIGS. 7(a) and 7(b) show a prior art hybrid integrated circuit structure. FIG. 7(a) is a top view without the resin mold package, and FIG. 7(b) is a cross section thereof with the resin mold package included. A lead frame 2 comprises an outer lead 24a, an inner lead 24b, a tie-bar 23, a support-bar 22, and a support plate 20. The support plate 20 has a square or rectangular shape and is supported by four of the support-bars 22 at each corner of the square/rectangular shape. A ceramic substrate 1 is supported on the support plate 20 of the lead frame 2. As shown in FIG. 7(b), a semiconductor integrated circuit chip 11, a capacitor 12, and a resistor (not shown) are disposed or formed on the substrate 1. These active and passive elements are connected to each other and/or to a bonding pad and/or to a conductive wiring pattern formed on the substrate 1 by a bonding wire. The bonding wires and wiring pattern are not shown in the FIG. 7(a). The bonding pads are further connected to the terminals of the inner leads 24b by a bonding wire 5 as shown in FIG. 7(b). Thereafter, the assembly is subjected to a transfer-mold process to form a mold package 6, such as shown in FIG. 7(b). The outer leads 24a are then shaped and the unnecessary portions of the lead frame 2 are cut off to complete the hybrid integrated circuit.
When the hybrid integrated circuit disclosed above is subjected to a number of heat cycles during operation, a crack 8 such as shown in FIG. 7(b) often arises in the resin mold package. The crack usually originates at the corner of the substrate 1 or the support plate 20. To solve the problem of cracks being formed, several references on package structures were disclosed in U.S. application Ser. No. 375,708, filed Jul. 5, 1989, now U.S. Pat. No. 4,994,985 issued Feb. 19, 1991. These references are U.S. Pat. No. 4,816,427 and Japanese Publications SHO 63-81966, 52-95173, 57-39558, 61-99360, 61-102054, 62-263665, 55-103752, 53-13874, and 58-18948. Most of these references relate to package structures for semiconductor integrated circuit chips which have a smaller size than a hybrid integrated circuit substrate. None of these references disclose methods for forming holes or notched portions in the peripheral zone of a support plate or for forming a hole in the central zone thereof.